PAYMENT DETAILS

  • Order Details
    1
  • Confirm
    2

Order Details

Are you one of the authors of this manuscript?
No. of Copies
 
(minmum 25 copies)

Billing and Shipping Addresses

Billing Address

Payer Name
Email
Phone
Address
City
Country
Tax/Customs info
(e.g. 'CPF/CNPJ', 'RUT','EORI', or 'NPWP')

Shipping Address

Attention of
Email
Phone
Address
(P.O. Box is not allowed)
City
Country

Note: if you do not confirm your information in step 2, your information will not be saved.

Article Details

Journal Title
VLSI Design
Volume
2013
Article Title
FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix Adders
List of Authors
  • L. P. Deepthi Bollepalli(ORCID ID: http://orcid.org/0000-0002-5833-3428)
  • Chris D. Martinez(ORCID ID: http://orcid.org/0000-0002-2904-4184)
Article ID
382682
Article Type
Research Article
No. of Pages
10 Pages
Corresponding Author
David H. K. Hoe
Additional Authors

Invoice Details

Invoice Issue Date
8 May 2024
Type of Reprints
Colored, Covered
Invoice Ref. No.
Terms
Payable upon Receipt

Charges

No. of Copies
Reprints Charges
0.00
Total
$